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Progress List:Patents
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I. Circuits and Systems |
II. Device Modeling |
III. Nanodevices and Processing |
[1] H.J. Mattausch and T. Koide, "Pattern matching and pattern recognition system, associative memory apparatus, and pattern matching pattern recognition processing method," JPN Patent Application No.2002-165759 (2002.05.31).
[2] H.J. Mattausch and T. Koide, "Self-adjusting winner lineup amplifier," JPN Patent Application No.2002-159436 (2002.06.06).
[3] T. Koide, H.-J. Mattausch, T. Morimoto, and Y. Harada, "Image segmentation method, image segmentation apparatus, image processing method, and image processing apparatus," JPN Patent Application No. 2002-152491, (2002.05.27).
[4] T. Hironaka, H.-J. Mattausch and T. Koide, T. Hirakawa, K. Johguchi, "Multi-port integrated cache," Japanese Patent Application 2002-320037 (2002.11.11).
[5] H.J. Mattausch and T. Koide, "Pattern matching and pattern recognition system, associative memory apparatus, and pattern matching pattern recognition processing method," USA Patent Application No.10/453,636 (2003.05.27).
[6] H.J. Mattausch and T. Koide, "Pattern matching and pattern recognition system, associative memory apparatus, and pattern matching pattern recognition processing method," EPC Patent Application No.03012722.9 (2003.05.27).
[7] H.J. Mattausch and T. Koide, "Pattern matching and pattern recognition system, associative memory apparatus, and pattern matching pattern recognition processing method," KOR Patent Application No.2003-36263 (2003.05.27).
[8] H.J. Mattausch and T. Koide, "Pattern matching and pattern recognition system, associative memory apparatus, and pattern matching pattern recognition processing method," TWN Patent Application No.92115261 (2003.05.27).
[9] H.J. Mattausch and T. Koide, "Self-adjusting winner lineup amplifier," USA Patent Application No.10/445,033 (2003.06.04).
[10] H.J. Mattausch and T. Koide, "Self-adjusting winner lineup amplifier," EPC Patent Application No.03011724.6 (2003.06.04).
[11] H.J. Mattausch and T. Koide, "Self-adjusting winner lineup amplifier," KOR Patent Application No.2003-34611 (2003.06.05).
[12] H.J. Mattausch and T. Koide, "Self-adjusting winner lineup amplifier," TWN Patent Application No.92114262 (2003.06.05).
[13] H. J. Mattausch, T. Koide, T. Hironaka, H. Uchida, K. Johguchi, Z. Zhu, " Memory with Synchronous Bank Architecture," Japanese Patent Application 2003-167989 (2003.6.12).
[14] H.J. Mattausch, T. Koide, M. Mizokami, "Recognition and Learning Method of Reference Data and Pattern-Recognition System," Japanese Patent Application 2003-434596 (2003.12.26).
[15] T. Koide, H.-J. Mattausch, T. Morimoto, and Y. Harada, "Image segmentation method, image segmentation apparatus, image processing method, and image processing apparatus," USA Patent Application No.10/445,247, (2003.05.26).
[16] T. Koide, H.-J. Mattausch, T. Morimoto, and Y. Harada, "Image segmentation method, image segmentation apparatus, image processing method, and image processing apparatus," EPC Patent Application No.03011840.0, (2003.05.26).
[17] T. Koide, H.-J. Mattausch, T. Morimoto, and Y. Harada, "Image segmentation method, image segmentation apparatus, image processing method, and image processing apparatus," KOR Patent Application No.2003-33324, (2003.05.26).
[18] T. Koide, H.-J. Mattausch, T. Morimoto, and Y. Harada, "Image segmentation method, image segmentation apparatus, image processing method, and image processing apparatus," TWN Patent Application No.92114142, (2003.05.26).
[19] T. Koide, H.-J. Mattausch, T. Morimoto, and Y. Harada, "Image segmentation apparatus, image segmentation method, and image segmentation integrated circuit," JPN Patent Application No. 2003-322163, (2003.09.12).
[20] T. Hironaka,H.-J. Mattausch and T. Koide, T. Hirakawa, K. Johguchi,Å@"Multi-port integrated cache," USA Patent Application TBD (2003.10.06).
[21] H.J. Mattausch and T. Koide, "Associative Memory Apparatus for searching data in which Manhattan Distance is Minimum," JPN Patent Application No. 2004-017429 (2004.01.26).
[22] H.J. Mattausch, T. Koide, Y. Shirakawa, "Method for Reference-Data Optimization and Pattern-Recognition System," Japanese Patent Application 2004-053433 (2004.2.27).
[23] H. J. Mattausch, T. Koide, T. Hironaka, H. Uchida, K. Johguchi, Z. Zhu, "Memory with Synchronous Bank Architecture," No.TBD, (2004.2).
[24] H.J. Mattausch and T. Koide, "Associative Memory Apparatus for searching data in which Manhattan Distance is Minimum," USA, Patent Application No.TBD (2004.05.31).
[25] H.J. Mattausch and T. Koide, "Associative Memory Apparatus for searching data in which Manhattan Distance is Minimum," EPC Patent Application No.TBD (2004.05.31).
[26] H.J. Mattausch and T. Koide, "Associative Memory Apparatus for searching data in which Manhattan Distance is Minimum," KOR Patent Application No.TBD (2004.05.31).
[27] H.J. Mattausch and T. Koide, "Associative Memory Apparatus for searching data in which Manhattan Distance is Minimum", TWN Patent Application No.TBD (2004.05.31).
[28] H. J. Mattausch, T. Koide and M. Mizokami, "Reference Data Recognition and Learning Method and Pattern Recognition System," USA Patent Application No. TBD. (2004. 6. 15).
[29] H. J. Mattausch, T. Koide and M. Mizokami, "Reference Data Recognition and Learning Method and Pattern Recognition System," EPC Patent Application No. TBD. (2004. 6. 15).
[30] H. J. Mattausch, T. Koide and M. Mizokami, "Reference Data Recognition and Learning Method and Pattern Recognition System," KOR Patent Application No. TBD. (2004. 6. 15).
[31] H. J. Mattausch, T. Koide and M. Mizokami, "Reference Data Recognition and Learning Method and Pattern Recognition System," TWN Patent Application No. TBD. (2004. 6. 15).
[32] T. Koide, H.-J. Mattausch, T. Morimoto, and Y. Harada, "Image segmentation apparatus, image segmentation method, and image segmentation integrated circuit," USA Patent Application No. TBD, (2004.05.31).
[33] T. Koide, H.-J. Mattausch, T. Morimoto, and Y. Harada, "Image segmentation apparatus, image segmentation method, and image segmentation integrated circuit," EPC Patent Application No. TBD, (2004.05.31).
[34] T. Koide, H.-J. Mattausch, T. Morimoto, and Y. Harada, "Image segmentation apparatus, image segmentation method, and image segmentation integrated circuit," KOR Patent Application No. TBD, (2004.05.31).
[35] T. Koide, H.-J. Mattausch, T. Morimoto, and Y. Harada, "Image segmentation apparatus, image segmentation method, and image segmentation integrated circuit," TWN Patent Application No. TBD, (2004.05.31).
[36] MÅDSasaki, AÅDIwata, DÅDArizono, "Semiconductor Equipment," Japanese Patent 2004-10053, (2004.01.19)
[37] SÅDKameda, AÅDIwata, MÅDSasaki, KÅDKikkawa, Japanese Patent 2004-022317 (Application), (2004.01.28)
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TOP |
I. Circuits and Systems |
II. Device Modeling |
III. Nanodevices and Processing |
[38] M. Miura-Mattausch, D.Kitamaru, Japanese Patent H15-077934, (2003.3.14).
[39] M. Miura-Mattausch, N. Nakayama, Japanese Patent 2003-318947, (2003.9.10).
[40] M. Miura-Mattausch, H.Ueno, S.Hosokawa, Japanese Patent 2003-420845,(2003.12.18).
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TOP |
I. Circuits and Systems |
II. Device Modeling |
III. Nanodevices and Processing |
[41] T. Fujii, S. Yokoyama, Taiwan Patent, 091109971,(2002.05.14).
[42] A. Nakajima, Japanese Patent, 2002-158788 (2002.05.31).
[43] A. Nakajima, Japanese Patent, 2002-268342 (2002.09.13).
[44] S. Yokoyama, A. Nakajima, Y. Tada, G. Nakamura, M. Imai, T. Yonekawa, "Method of fabricating semiconductor device," International Patent PCT/JP02/05386 (2002.05.31), WO 02/099868 (2002.12.12).
[45] K. Kikkawa, A. Iwata, H. Sunami, , S. Yokoyama, K. Shibahara, A. Nakajima, T. Koide, A.B.M.H. Rashid, S. Watanabe, Japanese Patent, 2003-117826 (2003.4.23).
[46] A. Nakajima, S. Yokoyama, K. Kikkawa, M. Wake, Japanese Patent, 2003-081181 (2003.03.24).
[47] A. Nakajima, "Semiconductor device and method for manufacturing same" USA Patent, 10/437119 (2003.05.14).
[48] M. Ogiwara, H. Fujiwara, S. Yokoyama, Japanese Patent, MA901355,(2003.09.29).
[49] K. Shibahara, Japanese Patent, 2003-311387, (2003.9.3).
[50] M. Murakawa, K. Shibahara, T. Oda, T. Higuchi, K. Nishi, Japanese Patent, 2003-320495 (2003.9.12).
[51] A. Nakajima, Japanese Patent, 2004-099015 (2004.03.30).
[52] R. Nishibayashi, T. Miyazaki, T. Imai, T. Tabei, S. Yokoyama, Japanese Patent, 2004-123383.
[53] R. Nishibayashi, T. Miyazaki, T. Imai, T. Tabei, S. Yokoyama, Japanese Patent, 2004-123379
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